1. Field of the Invention
The invention relates to a phase locked loop (PLL) and, in particular, to a PLL with a calibration circuit.
2. Description of the Related Art
Accurate loop bandwidth calibration of a fractional-N PLL is important for ΔΣ frequency modulators because wider loop bandwidth will increase phase noise and quantization error. A lower loop bandwidth, on the other hand, will suppress modulation messages and increase phase errors.